Workload-aware low-power supply voltage controller

نویسندگان

  • Saurabh Sinha
  • Jounghyuk Suh
  • Bertan Bakkaloglu
  • Yu Cao
چکیده

Current microprocessors are complex systems with multiple cores and non-trivial architectures, employing millions of sub-100nm transistors designed for extreme power, speed, and reliability constraints.1 An efficient control scheme for dynamic power, reliability, error detection-correction, workload scheduling, and thermal management is required. However, neuromorphic architectures are currently more suitable for complex tasks, such as noisy nonlinear data classification and prediction, relative to Boolean logic architecture (see Figure 1). We use a dynamic voltage scaling (DVS) control scheme as a test bench to demonstrate neuromorphic controller efficiency.2 Microprocessors are typically designed to operate at a target frequency (f ) and supply voltage (VDD) for peak performance. Active power dissipation (P ) in a complimentary metaloxide-semiconductor (CMOS) circuit is given by the equation P D CV 2 DD f , where C is total switched capacitance. However, peak performance is not always required, and significant energy savings can be achieved by dynamically varying the operating voltage and processor frequency to meet instantaneous workload demand. Most DVS schemes are implemented in software, which adopts offline profiling to learn averageor worst-case execution task time.4 These schemes involve elaborate calculations to estimate a combination of VDD and f optimized for minimum power, and are not suitable for time-varying workload. Two examples are a DVS controller that predicts futureworkload based on past workload profile using adaptive and non-adaptive filters,5 and statistical DVS techniques using cumulative distribution function (CDF) and probability density function (PDF) of offline workload profiling.6 Since the time-varying workload profile is highly nonlinear and aperiodic in nature, it is a good test bench to explore the potential of a neuromorphic controller predictor. Figure 1. (a) Qualitative plot of machine complexity vs. task complexity for a Boolean logic computer and a neuromorphic computing architecture.3 (b) Workload and dynamic voltage scaling (DVS, supply voltage) profile of a generic microprocessor. CPU: Central processing unit.

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تاریخ انتشار 2011